3D-IC packaging is widely seen as an important avenue for maintaining traditional increases in semiconductor performance. Through-silicon vias (TSVs), the foundation of the 3D-IC revolution, are a key enabler for these increases. But only small, high-density vias can provide reduced thermo-mechanical stress, improved signal integrity and efficient use of on-chip real estate.

TSVs of this type, with aspect ratios of 10:1 and higher, cannot be manufactured with acceptable costs and yields using traditional dry processes for liner, barrier and seed deposition. Basic shortcomings of i-PVD copper seed and CVD/ALD barrier coverage in deep TSVs, coupled with high capital costs, are holding back the industry-wide adoption of 3D-IC solutions.

Alchimer’s fluid-based processes can easily reach the sides and bottoms of TSVs, and quickly deposit extremely uniform film stacks (isolation, barrier and fill layers) that are atomically fused to the TSV’s surface. This eliminates voids, opens, and shorts, enabling higher yields while also providing substantial cost savings in both capital investment and ongoing operations.

Our processes’ exceptional capability also means that circuit designers can utilize narrower TSVs, which take up less space on the silicon die – another means of cutting cost or improving performance.