APPLICATIONS Dual Damascene Interconnects

Advanced silicon chips have about a dozen layers of microscopic metal interconnection, and contain several kilometers of wiring. Fabricating these complex structures using the dual damascene process has always been a challenge, and ever-shrinking geometries with higher aspect ratios are making the situation worse. Existing deposition technology is struggling to maintain yield, despite a premium price.

Alchimer’s fluid-based Electrografting (eG™) and Chemicalgrafting (cG™) processes excel at dual damascene’s barrier layer and fill steps, because they can easily deposit uniform films over the complex topographies of a modern chip. And with cost savings of 60 percent or more compared to PVD, Alchimer’s wet processes can have a huge impact on the economics of the estimated 150 million copper metal wafer layers to be processed in 2012.